This relates to memory elements, and more particularly, to memory elements such as volatile memory elements with voltage overstress protection features.
Integrated circuits often contain volatile memory elements. Typical volatile memory elements are based on cross-coupled inverters (latches). Volatile memory elements retain data as long as the integrated circuit is powered. For example, integrated circuits may include volatile memory elements such as static random access memory (SRAM) cells.
Integrated circuits such as programmable integrated circuits may include volatile memory elements such as configuration random access memory (CRAM) cells that are loaded with configuration data. Each CRAM cell has an output that provides a control signal that is used to enable or disable pass transistors in logic circuitry. Pass transistors (pass gates) are typically formed from n-channel transistors.
Pass transistors are turned on or off to selectively pass or block passage of logic signals in response to the control signal provided by the CRAM cells. In an effort to increase performance, pass transistors can be turned on using elevated gate control signals. In an effort to reduce leakage, pass transistors can be turned off using lowered gate control signals.
CRAM cells can be powered using an elevated positive power supply voltage level (i.e., a voltage level that is greater than a nominal positive power supply voltage level that is supplied to other parts of the integrated circuit) and a lowered ground power supply voltage level (i.e., a voltage level that is less than a nominal ground power supply voltage level that is supplied to other parts of the integrated circuit). This type of CRAM cell can be used to produce the elevated control signals and the lowered control signals. However, biasing memory cells in this way may overstress the transistors in the memory cells, leading to a potential for transistor breakdown and unacceptable reliability.
Conventional methods for counteracting this type of voltage overstress include forming memory cells with thick oxide transistors. The fabrication of thick oxide memory transistors may be undesirable, however, because such transistors may require the use of additional and potentially incompatible processing steps.
It would therefore be desirable to be able to provide improved memory elements with voltage overstress protection features.